1. Field of the Invention
The present invention relates in general to integrated circuit (IC) manufacturing and, more specifically, to methods for tracking IC devices in a substantially continuous flow of IC devices from multiple lots through one or more steps in an IC manufacturing process.
2. State of the Art
Integrated circuits (IC""s) are small electronic circuits formed on the surface of a wafer of semiconductor material, such as silicon, in an IC manufacturing process referred to as xe2x80x9cfabrication.xe2x80x9d Once fabricated, IC""s are probed to evaluate a variety of their electronic characteristics, cut from the wafer on which they were formed into discrete IC dice or xe2x80x9cchips,xe2x80x9d and then assembled for customer use using various well-known IC packaging techniques, including lead frame packaging, Chip-On-Board (COB) packaging, and flip-chip packaging.
During the manufacturing process, IC""s generally undergo a variety of tests to ensure they will function properly once shipped. Testing typically involves a variety of known test steps, such as speed grading, burn-in, and final, which test IC""s for defects and functionality and grade IC""s for speed.
IC""s are typically tracked through the fabrication, probe, assembly, and test steps described above so correlations can be found between the results of tests performed on IC""s in the test steps and the xe2x80x9cpathxe2x80x9d the IC""s took through the manufacturing process. For example, by tracking a group of IC""s through the manufacturing process, it might be determined that IC""s wire-bonded on a particular wire-bonding machine have an unusually high failure rate when tested. Similarly, it might be determined that a test machine itself is failing a disproportionate number of IC""s. In either case, tracking IC""s through the manufacturing process allows the source of a problem to be pinpointed and addressed.
As shown in FIG. 1, a conventional procedure 10 for tracking IC""s through a process step 12 in an IC manufacturing process involves the use of lot numbers for the IC""s. Lot numbers are first assigned to wafers during fabrication. Typically, a group of 20-50 wafers receives a single unique lot number (e.g., 36/1/9970). As the group of wafers proceeds to probe, the wafers are typically split into several sub-lots, with each sub-lot being assigned a new lot number (sometimes referred to as a xe2x80x9csub-lotxe2x80x9d number) that is a modified form of the group""s original lot number (e.g., 36/1/9970/0, 36/1/9970/1, . . . ). As the group continues through the manufacturing process, sub-lots are split and re-split for a variety of reasons until the group is typically split into many sub-lots, all having a unique lot number that is a modified form of the group""s. original lot number.
In the conventional tracking procedure 10, a sub-lot (e.g., sub-lot H) is received from an input queue 14 where sub-lots wait to proceed through the process step 12. The process step 12 may be any step in the IC manufacturing process including, for example, probe, wafer saw, speed grading, burn-in, or final testing.
As a sub-lot advances through the process step 12, data 16 related to the process step 12 is generated. Such data 16 may include, for example: an identification of the processing equipment and the operating personnel for the process step 12; information regarding the set-up of the process step 12; the time and date the sub-lot advanced through the process step 12; and yield and test results from the process step 12.
Once a sub-lot has advanced through the process step 12, a process report 18 is manually or automatically generated based on the generated data 16. To associate the report 18, and hence the data 16, with the IC""s in the sub-lot, and thus track the IC""s through the process step 12, the report 18 lists the lot number (e.g., xe2x80x9cHxe2x80x9d) of the IC""s in the sub-lot. Typically, the report 18 also physically accompanies the sub-lot through the remainder of the manufacturing process to ensure that the data 16 is correlated with the IC""s in the sub-lot, although this is not necessary if other indicia identifying the lot number of the IC""s in the sub-lot physically accompany the sub-lot through the manufacturing process.
With the report 18 generated, a processed sub-lot (e.g., sub-lot H) is cleared from equipment associated with the process step 12 to an output queue 20 to prepare the process step 12 for processing another sub-lot (e.g., sub-lot I). Once the processed sub-lot is cleared, the next sub-lot can be processed. This xe2x80x9cclearingxe2x80x9d process is necessary because if two sub-lots (e.g., sub-lots H and I) proceed through the process step 12 in a continuous manner, the conventional tracking procedure 10 is unable to correlate the data 16 and the process report 18 generated as each of the two sub-lots proceed with the correct sub-lot. Instead, the data 16 for the two sub-lots is mixed, causing the conventional tracking procedure 10 to fail to uniquely track the two sub-lots through the process step 12.
The conventional tracking procedure described above is problematic because it makes inefficient use of often very expensive manufacturing and test equipment and other resources by leaving sub-lots xe2x80x9cparkedxe2x80x9d in input queues while process reports are generated and the equipment is cleared of already processed sub-lots. In process steps which use multiple machines in parallel to process a sub-lot, some machines may be idle while other machines finish their allotment from the sub-lot being processed and the next sub-lot waits in an input queue. In addition, generation of the process reports, as well as clearing a processed sub-lot from equipment, often requires laborious manual work by operating personnel. Further, a process report that must physically accompany a sub-lot through the manufacturing process may become lost or damaged, and thus is not as reliable a means of tracking IC""s as is desired.
As described in U.S. Pat. Nos. 5,301,143, 5,294,812, and 5,103,166, some methods have been devised to aid quality control personnel in tracking IC""s undergoing failure analysis back to the wafer from which they come. By tracking the IC""s back to their wafer, test data related to the IC""s can be correlated to the wafer to pinpoint possible problems with the wafer. Such methods take place xe2x80x9coffxe2x80x9d the manufacturing line, and involve the use of electrically retrievable identification (ID) codes, such as so-called xe2x80x9cfuse ID""s,xe2x80x9d programmed into individual IC""s to identify the IC""s. Fuse ID""s and other electrically retrievable ID codes are typically programmed into IC""s by blowing selected fuses or anti-fuses in circuitry on the IC""s so that the circuitry outputs the ID code when accessed. Unfortunately, none of these methods addresses the inefficiency problems caused by the conventional lot-based tracking procedure described above.
Therefore, there is a need in the art for a procedure for tracking IC""s through an IC manufacturing process that uses manufacturing resources more efficiently. Such a procedure should not leave equipment idle while IC""s wait to be processed. In addition, such a procedure should achieve a level of reliability not reached by conventional tracking procedures.
An inventive method for tracking integrated circuit (IC) devices of the type to each have a substantially unique identification ( ID) code (e.g., a fuse ID) through a step in an IC manufacturing process includes: reading the ID code of each of the IC devices; advancing multiple lots of the IC devices through the step in the manufacturing process in a substantially continuous manner; generating data, such as processing equipment data or test data, related to the advancement of each of the IC devices through the step in the process; and associating the data generated for each of the IC devices with the ID code of its associated IC device.
By associating the data with the ID codes, the inventive method allows the IC devices to be tracked through the step in the process. Further, because multiple lots of the IC devices can advance through the step in the manufacturing process continuously, manufacturing resources are used more efficiently. In addition, because the ID codes and associated data read and generated using the inventive method need not physically accompany IC""s as they progress through the manufacturing process, the inventive method is more reliable than conventional tracking procedures.
In another embodiment, a method of manufacturing IC devices from semiconductor wafers includes: providing wafers in multiple lots; fabricating IC""s on the wafers; causing each of the IC""s to permanently store a substantially unique ID code, such as a fuse ID; separating the IC""s from their wafers to form IC dice; assembling the IC dice into IC devices; reading the IC code from the IC in each of the IC devices; testing each of the IC devices; while testing the IC devices: advancing the IC devices from the multiple lots of wafers through at least one test step in a substantially continuous manner; generating data related to the advancement of each of the IC devices through the test step; and associating the data generated for each of the IC devices with the ID code of the IC in its associated IC device.
In a further embodiment, a method for correlating variables related to an IC manufacturing process with variables related to the performance of IC devices as they advance through the process includes: causing each of multiple IC""s from multiple lots to permanently store a substantially unique ID code, such as a fuse ID; reading the ID code from each of the IC devices; advancing the IC devices from the multiple lots through at least one step in the manufacturing process in a substantially continuous manner; while the IC devices advance through the step in the manufacturing process, generating data related to process variables associated with the step in the process; generating data related to variables associated with the performance of at least some of the IC devices as they advance through at least one step in the manufacturing process; and associating the process variable-related data and the performance variable-related data generated for each of the IC devices with the ID code of the IC device associated with the data to correlate the process variables with the performance variables.